H96 Pro+ S912 Standby mode

  1. CL13 seems to be too much for the PE037-125. This RAM memory type requires/runs well with a CL value of 11. The Clk. Rate has to be lowered to 792Mhz (~ 800). You need another u-boot binary.
  2. The power supply may also be faulty.
  1. where do i get the right u-boot from? Can I compile it myself?
    Sorry if I ask stupid questions.

  2. in fact i don’t have the original included power supply (because it’s broken).
    However, I had no problems using both Android and Coreelec with the new.

Read above, there is a guide in the uboot wiki. Before compiling, open the board configfile (/board/h96proplus/configs/v2_2.h) and change the value of the clk. Rate from 912Mhz to 792Mhz.

v2_2.h:

#define CONFIG_DDR_CLK					792

If you’ve done everything right, the CL value should change from 13 to 11.

Rank1: 1024MB(auto)-2T-11

From where you got the type of ram?

@worldtest
uboot_v2_2_792MHz.zip (1.4 MB)

Maybe I have to split a little more the PCB boards.
These are what I found:
CZ-S32-V2.2 (DDR3)
CZ-S32-V3 (DDR4)
CZ-S32-V5 (LPDDR3)
CZ-S32-V6 (LPDDR3)
CZ-S32-V6.1 (LPDDR3)
ZH-01-S912-TVBOX-V.2.0
ZH-01-S912-TVBOX-V.3.0 (DDR3)

1 Like

From here

I have now found the time to realize @bumerc idea. Thanks @Portisch for the u-boot files. But I compiled it myself (I wanted to do it anyway).
With the changed Mhz number booting worked at the first try! So again a big thank you to @Portisch and @bumerc, for your very useful help!
It works so far at first view everything. However, I noticed small things:

When I restart Coreelec, the box goes off, but not on again. Only after pressing the power button the box starts again (this was also the case with the original U-Boot).

Goes off

[ 330.767128@0] reboot: Restarting system(systemd-shutdow)
bl31 reboot reason: 0xd
bl31 reboot reason: 0x1
system cmd 1.

GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 103892

BL2 Built : 16:32:58, Nov 3 2017.
gxl gb5491d8 - xiaobo.gu@droid12

set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - PASS
Rank0: 2048MB(auto)-2T-11
Rank1: 1024MB(auto)-2T-11
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00065c00
NOTICE: BL3-1: v1.0(release):35dd647
NOTICE: BL3-1: Built : 15:20:30, Feb 7 2018
NOTICE: BL31: BL33 decompress pass
mpu_config_enable:ok

[Image: gxl_v1.1.3243-377db0f 2017-09-07 11:28:58 qiufang.dai@droid07]

OPS=0x82

wdt: reset registers!

8d a f2 47 2b 70 cf ee 81 56 16 5b [0.342546 Inits done]

secure task start!
high task start!
low task start!
ERROR: Error initializing runtime service opteed_fast

U-Boot 2015.01-gbc6f877-dirty (Dec 11 2018 - 15:22:33)

DRAM: 3 GiB
Relocation Offset is: b6eb4000
registe

Power button

GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 105782

BL2 Built : 16:32:58, Nov 3 2017.
gxl gb5491d8 - xiaobo.gu@droid12

set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - PASS
Rank0: 2048MB(auto)-2T-11
Rank1: 1024MB(auto)-2T-11
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00065c00
NOTICE: BL3-1: v1.0(release):35dd647
NOTICE: BL3-1: Built : 15:20:30, Feb 7 2018
NOTICE: BL31: BL33 decompress pass
mpu_config_enable:ok

[Image: gxl_v1.1.3243-377db0f 2017-09-07 11:28:58 qiufang.dai@droid07]

OPS=0x82

wdt: reset registers!

8d a f2 47 2b 70 cf ee 81 56 16 5b [0.344519 Inits done]

secure task start!
high task start!
low task start!
ERROR: Error initializing runtime service opteed_fast

U-Boot 2015.01-gbc6f877-dirty (Dec 11 2018 - 15:22:33)

DRAM: 3 GiB
Relocation Offset is: b6eb4000
register usb cfg[0][1] = 00000000b7f5a960
[CANVAS]canvas init
boot_device_flag : 1
Nand PHY Ver:1.01.001.0006 (c) 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
reset failed
get_chip_type and ret:fffffffe
get_chip_type and ret:fffffffe
chip detect failed and ret:fffffffe
nandphy_init failed and ret=0xfffffff1
MMC: aml_priv->desc_buf = 0x00000000b3eb46b0

If the box is off (after shutdown) and I want to start it with the remote control, it lights up shortly blue and nothing happens. Only with second pressing of the power key the box starts. In general not bad, because it didn’t work at all with the original u-boot!

Shutdown

[ 73.247990@0] reboot: Power down
bl31 reboot reason: 0x108
bl31 reboot reason: 0x108
system cmd 0.

bl30 get wakeup sources!

process command 00000006
bl30 enter suspend!

cpu clk suspend rate 1000000000

suspend_counter: 1

Enter ddr suspend

first time suspend

ddr suspend time: 1886us

store restore gp0 pll

process command 00000001
CEC cfg:0x0019
set vddee to 0x035cmv
08915d0000000000cec reset
kern log_addr:0x0f
rx stat:00, tx stat:00
rx stat:00, tx stat:01
ping_cec_ll_tx:TX_ERROR
Set cec log_addr:0x01, ADDR0:11

Power button

08915c0000000000exit_reason:0x02
set vddee to 0x03e8mv
set vdd_cpu a to 0x0460mv
set vdd_cpu a to 0x041amv
store restore gp0 pll

gp0 pll can’t lock

read gp0_ctrl 40000000

read gp0_ctrl2 0

read gp0_ctrl3 0

read gp0_ctrl4 0

Enter ddr resume

ddr resume time: 364us

cfg15 3b00000

cfg15 23b00000

BL1:dc8b51:76f1a5;FEAôGXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 101347

BL2 Built : 16:32:58, Nov 3 2017.
gxl gb5491d8 - xiaobo.gu@droid12

set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - PASS
Rank0: 2048MB(auto)-2T-11
Rank1: 1024MB(auto)-2T-11
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00065c00
NOTICE: BL3-1: v1.0(release):35dd647
NOTICE: BL3-1: Built : 15:20:30, Feb 7 2018
NOTICE: BL31: BL33 decompress pass
mpu_config_enable:ok

[Image: gxl_v1.1.3243-377db0f 2017-09-07 11:28:58 qiufang.dai@droid07]

OPS=0x82

wdt: reset registers!

8d a f2 47 2b 70 cf ee 81 56 16 5b [0.340123 Inits done]

secure task start!
high task start!
low task start!
ERROR: Error initializing runtime service opteed_fast

U-Boot 2015.01-gbc6f877-dirty (Dec 11 2018 - 15:22:33)

DRAM: 3 GiB
Relocation Offset is: b6eb4000
registe

Power button again

GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 105535

BL2 Built : 16:32:58, Nov 3 2017.
gxl gb5491d8 - xiaobo.gu@droid12

set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
DDR3 chl: Rank0+1 @ 792MHz - PASS
Rank0: 2048MB(auto)-2T-11
Rank1: 1024MB(auto)-2T-11
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00065c00
NOTICE: BL3-1: v1.0(release):35dd647
NOTICE: BL3-1: Built : 15:20:30, Feb 7 2018
NOTICE: BL31: BL33 decompress pass
mpu_config_enable:ok

[Image: gxl_v1.1.3243-377db0f 2017-09-07 11:28:58 qiufang.dai@droid07]

OPS=0x82

wdt: reset registers!

8d a f2 47 2b 70 cf ee 81 56 16 5b [0.344256 Inits done]

secure task start!
high task start!
low task start!
ERROR: Error initializing runtime service opteed_fast

U-Boot 2015.01-gbc6f877-dirty (Dec 11 2018 - 15:22:33)

DRAM: 3 GiB
Relocation Offset is: b6eb4000
register usb cfg[0][1] = 00000000b7f5a960
[CANVAS]canvas init
boot_device_flag : 1
Nand PHY Ver:1.01.001.0006 (c) 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
reset failed
get_chip_type and ret:fffffffe
get_chip_type and ret:fffffffe
chip detect failed and ret:fffffffe

  1. Did you connect any external device to the USB port?
  2. Read through the wiki manual exactly, cec19 is no longer used, change this value accordingly.
1 Like
  1. No, there was no USB device on the box the whole time.
  2. I have now changed cec19 to cec3f via ssh. Why isn cec19 the default when it’s no longer used?

most likely the guys just forgot.

————-
For Experiments - if anyone wants to test WOL, here are new uboot binaries.
-Added KBI, and RTL8211F external phy driver
-TFTP should now work too.
The binaries have not been tested since I am limited in time. Therefore installation at your own risk. (network and boot problems can occur :slight_smile: ).

u-boot_ddr3_4_lpddr3
Please do not install on DDR3-CL11 (792Mhz) devices.

I am currently also working on WOL for this box. And have seen the same features missing you said. But I didn’t had time yet to test it.

I guess I forgot to say my problem still remains. The change from cec19 to cec3f had no effect. But thanks for the help!

If you could provide the u-boot for DDR3 CL11, I would be able to test it for you. :wink:

@bumerc

v2_2#kbi init
i2c_read: i2c transfer failed
Error reading the chip: -6

I just tried with the enabled kbi interface. But the I2C address does not match.
The kbi interface will read data from a “eeprom” what the H96Pro+ do not have.
Only the function “set_wol” is needed…

Hi,
first I took over the complete KBI solution without changing anything on the code. So you can directly see what works and what does not, without looking into the HW specifications. The redundant code can later be discarded.

Is there any HW documentation for H96 Pro+? If I read the VIM2 code/schematic correctly, there is some work to do to prepare the PHY for WOL and keep the appropriate power at the network interface by something looks like a PIC.
On H96 Pro + there is a PHY mentioned at kernel log, but seems not to be the same as for VIM2.
Thanks for any hint

Unfortunately, I have not seen any HW documentation for this device yet.

Sorry, I am wrong. The PHY seems to be the same:

eth0: PHY ID 001cc916 at 0 IRQ POLL (stmmac-0:00) active

Hi @atomizasser,

If I understand correctly you’re able to suspend and wake up your minix u9-h with your IR remote without any problems?
Is it possible to post the steps needed to do this? I would like my minix to suspend instead of power off but I’m confused about the things I need to do.
At the moment it just bugs out…

Thanks,

I followed the guide in https://github.com/CoreELEC/u-boot/wiki#upgrade-u-bootbin and used method 2 for reboot minix.
the minix enters in suspend mode, but after wake up wifi is not turned on.
@Portisch @bumerc is there any method to avoid wifi module turned off in suspend mode or to reconnect after wake up form suspend mode?
Thanks.

What defconfig did u use?
the one in the guide: make h96proplus_v2_2_defconfig ?

Well i used compiled version and YES i used h96proplus_v2_2 u -boot.

By the way, doing this i got wifi working after wake up from suspend state:

https://forum.libreelec.tv/thread/524-s905-builds-general-discussion/?postID=40599#post40599

1 Like