Okay, did my testing with both my AM6B+ units and got similar results. Sharing one of them…
LSCPU:
CoreELEC:~ # lscpu
Architecture: aarch64
Byte Order: Little Endian
CPU(s): 6
On-line CPU(s) list: 0-5
Vendor ID: ARM
Model name: Cortex-A53
Model: 4
Thread(s) per core: 1
Core(s) per socket: 2
Socket(s): 1
Stepping: r0p4
CPU(s) scaling MHz: 100%
CPU max MHz: 1800.0000
CPU min MHz: 500.0000
BogoMIPS: 48.00
Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32
Model name: Cortex-A73
Model: 2
Thread(s) per core: 1
Core(s) per socket: 4
Socket(s): 1
Stepping: r0p2
CPU(s) scaling MHz: 100%
CPU max MHz: 2208.0000
CPU min MHz: 500.0000
BogoMIPS: 48.00
Flags: fp asimd evtstrm aes pmull sha1 sha2 crc32
Caches (sum of all):
L1d: 192 KiB (6 instances)
L1i: 320 KiB (6 instances)
L2: 1.3 MiB (2 instances)
CPU Test:
top - 21:08:14 up 7 min, 1 user, load average: 0.06, 0.22, 0.13
Tasks: 175 total, 2 running, 173 sleeping, 0 stopped, 0 zombie
%Cpu(s): 3.2 us, 1.1 sy, 0.0 ni, 95.7 id, 0.0 wa, 0.0 hi, 0.0 si, 0.0 st
MiB Mem : 3799.5 total, 2817.2 free, 600.5 used, 464.0 buff/cache
MiB Swap: 0.0 total, 0.0 free, 0.0 used. 3199.0 avail Mem
So, after pushing the new & improved DTB, I didn’t notice much difference from the last ‘enhancement’ I had done, which was to switch to HS400. That had a positive performance impact. Suspicious, I looked at my CoreELEC settings, and noticed the box had reverted to HS200 after doing the above. Switched back to HS400, rebooted, and viola! … yes, noticeably snappier!
Great work @MasterKeyxda! 
