S922X Ugoos AM6B Device Tree - Performance/Efficiency - Testing Needed

Those are it!! I’m glad the hierarchy is now found for 905X4.

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Shouldn’t this be Cache-level 3 ?

Don’t know, was just copying from elsewhere.

Tried both 2 and 3. Both still give

CoreELEC-21:~ # lscpu --caches
NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL SETS PHY-LINE COHERENCY-SIZE
L1d       32K     128K    4 Data            1  128                      64
L1i       32K     128K    4 Instruction     1  128                      64
L2       512K     512K   16 Unified         2  512                      64

Is the next-level-cache from the cpu just always reported as L2?

Yes always reported as 2

Can you run some small IO benchmark?

just browsing around interface with top or anything specific? I can run them

Not specific, make sure you are not at the high end of cpu usage.

@ All,

What happens if I brick the dtb and cannot boot from emmc, is there a way for me to just revert back to old dtb using android or something else?

I do not want to compile another full kernel because on the fly dtb is amazing now!

Can someone guide me here w.r.t emmc dtb bricking?

I want to add a parameter to:

/sd_emmc_c/emmc/caps

I tried running 4k and 1080 blueray remuxes I have and scrolling through interface with arctic horizon 2 theme, the cpu usage remains below 30% at all times.

Video steaming is piped to hardware. How was the UI?

Your initial feedback?

The UI feels more responsive maybe placebo. Youtube addon loads recommendations and subscriptions menu faster.

I keep hearing YouTube is faster. I don’t use YouTube.

Can someone write a script that measures this. Can you do it?

I will try and get back to you, I don’t have any experience though, first time for everything

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I disagree that UI feeling is only placebo. In my case of loading from sd card on am6plus in ondemand cpu government i had always tearing of working ui after start of kodi. Only performance cpu government was good in short time after start. Now with newer dtb is good response of ui also ondemand government. Also with new dtb was add 2 fps in retroarch what is 4% of new performance. Maybe on emmc case is not progress, but for loading CE from SC card is more better. But also have big impact on ui feeling e.g. freezing of reboot choice from menu - it is as waiting on not working but running addons. In process of restart in kodi is missing some schedule for killing of all slept process (sometimes is restart ok, sometimes not e.g. if addons gismeteo have issue loading new informations from webside,… a tv box wait wait wait and restart menu is freezed).

I got no where, sorry

I have a Ugoos AM6b, do I get it right that latest nightly already uses this?

Is the performance improvement certain or is it still in discussion? I have read all the thread here but got lost between cache nodes and different SoC talk, sorry…

@MasterKeyxda I tried modifying the cache node properties, and no matter whether I set them smaller than what is present on the SOC, or removed the properties from the node, lscpu --caches always reported the same values.

		l2-cache0 {
			compatible = "cache";
			cache-level = <0x02>;
			cache-unified;
			//cache-size = <0x40000>;
			//cache-line-size = <0x40>;
			//cache-sets = <0x200>;
		};

		l2-cache1 {
			compatible = "cache";
			cache-level = <0x02>;
			cache-unified;
			//cache-size = <0x100000>;
			//cache-line-size = <0x40>;
			//cache-sets = <0x400>;
		};
NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL SETS PHY-LINE COHERENCY-SIZE
L1d       32K     192K    4 Data            1  128                      64
L1i       32K     320K    2 Instruction     1  256                      64
L2       256K     1.3M   16 Unified         2  256                      64

The only thing that did matter was specifying a separate cache node for the A53 & A73 clusters. If only listing one cache, lscpu only reported the A53 L2 cache

NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL SETS PHY-LINE COHERENCY-SIZE
L1d       32K     192K    4 Data            1  128                      64
L1i       32K     320K    2 Instruction     1  256                      64
L2       256K     256K   16 Unified         2  256                      64

Since those three cache properties don’t seem to make a difference, it would be simpler to exclude them if they have no function.

The Linux repository does list the L2 cache node for all the NG amlogic devices, and that could be similarly added to CE.
https://github.com/torvalds/linux/commit/c2258a94fae556797085b58c0b6839c41826bd3d

They didn’t add a second L2 cache node for little.big cores, possibly an oversight.

If the idea of the capacity-dmips-mhz property is for the kernel to make decisions based on the SOCs computational abilities, I think using the dhrystone benchmark values are more appropriate. Because the benchmark values are an actual measure of computation, where as using the energy-cost values is more of an indirect estimation to fall back on if you don’t have the benchmark data.

I don’t know how the capacity-dmips-mhz values were determined for the Linux Amlogic DTB’s, the g12b (s922x) values listed are closer to what was calculated using the dmips values posted by Beelink for the s922x.

Hi all, just out of interest will this help or work with the minix-u22x-j-max ?

Optimization for S922 is already included in the latest nightlies.

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what about mode dtb for NE build s905x4 Homatics ?