SoC S5 S928X

Help & Support Hardware
1073

Hi @Portisch,

Sorry for the delayed reply.

I tested the update on my X96 X10, and everything worked perfectly this time. The DTB was handled correctly and the box booted normally after the update.

So it looks like the Multi-DTB issue is fixed on my side.

Thank you very much to you and @vpeter for fixing this!

1074

Hi all,

I am testing the latest CoreELEC 22 (Piers) nightly build (22.0-Piers_nightly_20260831) on my H96 Max M12 box (Amlogic S928X).

I am currently using the s5_s928x_tencent_aurora_5x DTB. System boots and runs fine, but neither Wi-Fi nor Bluetooth work.

Looking at dmesg, the PCIe Wi-Fi module fails to initialize due to a linkup timeout:

Plaintext

[    1.155177] amlogic-pcie-v3 e0000000.pcie: host bridge /soc/pcie@e0000000 ranges:
[    1.155209] amlogic-pcie-v3 e0000000.pcie:      MEM 0x00e1000000..0x00e4ffffff -> 0x00e1000000
[    1.158996] amlogic-pcie-v3 e0000000.pcie: normal gpio
[    1.159001] amlogic-pcie-v3 e0000000.pcie: GPIO normal: assert reset
[    1.425057] amlogic-pcie-v3 e0000000.pcie: Error: Wait linkup timeout. Pls check pcie device
[    1.425550] amlogic-pcie-v3 e0000000.pcie: failed init port
[    1.426261] amlogic-pcie-v3: probe of e0000000.pcie failed with error -110
...
[    3.465556] wifi_dummy: loading out-of-tree module taints kernel.
[    3.467503] wifi_dummy: Triggered SDIO/PCIe WiFi power on and bus rescan
[    3.467568] wifi_dummy: found disabled sdio@fe088000
[    3.467586] wifi_dummy: found enabled pcie@e0000000
[    3.467905] wifi_dummy: SDIO disabled, PCIe enabled

System Info:

  • Device: H96 Max M12 (Amlogic S928X)

  • CoreELEC Build: 22.0-Piers_nightly_20260831 (Amlogic-no.aarch64)

  • Kernel: 5.15.196

  • DTB used: s5_s928x_tencent_aurora_5x

It looks like the PCIe Wi-Fi/BT module on the H96 Max M12 PCB is not powered on or uses a different GPIO reset sequence than the Tencent Aurora 5X DTB expects, preventing the PCIe linkup.

Is there a specific GPIO pin mapping tweak needed for the M12 revision, or is a dedicated DTB planned for this box? Let me know if you need any extra logs or tests.

Thanks for your support!

1075

Make debug logs and DTB dump:

1076

https://paste.coreelec.org/2/97V2

original_dtb.img (256 KB)

1077

Hi everyone,

Iā€™m trying to run CoreELEC on my Tencent Aurora 5x (Amlogic S928X-J). I flashed CoreELEC to a USB 3.2 flash drive and it boots perfectly when plugged into the USB 2.0 port. However, when I plug it into the USB 3.0 port, it gets stuck at the Aurora box boot logo. Interestingly, the resolution and refresh rate have already switched to CoreELECā€™s output (so the kernel seems to have loaded), but it never reaches the CoreELEC interface.

Here is what Iā€™ve tried so far:

- Confirmed the correct DTB: s5_s928x_tencent_aurora_5x.dtb, renamed to dtb.img

System info:

- Device: Tencent Aurora 5x (S928X-J)

- CoreELEC version: CoreELEC-Amlogic-no.aarch64-22.0-Piers_nightly_20260919-Generic.img.gz

- USB drive: [64GB, USB 3.2]

- DTB: s5_s928x_tencent_aurora_5x.dtb

I would appreciate any help or suggestions

Thanks in advance!

1078

Use USB 3.0 or 2.0. USB 3.2 causes the CE to run slowly.

1079

No answers?

1080

Not much of Tencent devices. And mine is broken. I would fix it up but canā€™t get in touch with the company.

1081

:head_shaking_vertically: but this box was so cheap!

1082

Does anyone know if CE can be installed to the emmc on the Tencent Aurora 5x or is it USB only?

1083

Is eMMC dual boot (CoreELEC-Android) or single boot CE supported on the Minix U8K Ultra?

1084

You might have already heard about this (or maybe not), but the S928X (S5) chipset now supports DoVi P7 FEL decoding. According to a post by djnice77 over at AVS Forum, he managed to mod a CoreELEC build to get the S928X playing P7 FEL by combining CPU and GPU decoding. Iā€™m not a dev or a tech guy, so I have no idea what kind of magic he used to pull this off, but it actually works.

I tested it on my Ugoos SK1 and here are the results. Of course, there are still plenty of bugsā€”like crashes, GUI freezes, etc.ā€”but it works! My SK1 is outputting P7 FEL, which feels like an early Christmas gift to me.

I really hope the CoreELEC dev team considers integrating this feature into future builds. A huge thanks to the CoreELEC team for all your incredible hard workā€”this OS is already amazing, and seeing how dedicated you guys are to pushing hardware limits makes this community the best place to be!

IMG_6271
IMG_62714032Ɨ3024 2.02 MB

IMG_6272
IMG_62724032Ɨ3024 1.63 MB

IMG_6273
IMG_62734032Ɨ3024 1.31 MB

1085

Already discussed here: FEL - Amlogic NO support - #503 by MauriceW67

The consensus is Itā€™s a lot of code for one singular platform and here are cheaper hardware options available.

1086

screenshots with PPI is only showing the source info. not the processed info. so, that PPI is not to trust.

1087

Itā€™s literally rendering the one FEL test file which will not show ā€œThis Device Can Decode FELā€ if the device is not processing the FEL layer.

djnice had a huge hand in bringing FEL support to CE 22, heā€™s the one who developed the S928X solution. He knows what he is doing.

1088

Testing X96X10 PRO S928X-J for some time now.

Yes is alot to ask of Team CoreELEC for just one platform/SoC.

I really like the Dolby Vision FEL Demo Mode.!!!

Maybe just that could be added to CoreELEC?

Or @jamal2367 can add to tiny ppi.?

There is more to Dithering than meets the EYE.Humor only Ha ha ha.

CoreELEC by default has dithering/disabled for some time now?dj build is forced/enabled by default.

Maybe can have discussion in Unsupported EOL/ Hardware/Software threads.

1089

not to be rude against you or djniceā€¦i just said ONLY that PPI shows source info, not the processing info.

i didnā€™t say that it is not playing FEL.

and i know djnice already 3 years (maybe more). he (i think it is man :grinning_face:) is very capable person about coding and developing