Fire TV 2nd gen Cube (s922z)

CoreELEC is working on the FireTV 2nd gen Cube.

Specs:
Uses an S922Z SOC (variant of S922X reb b - Dolby Vision/Audio licensed)
1 x microUSB2 port
1 x IR extenter (+6 internal IR blasters)
1 x IR receiver
1 x HDMI port
16GB eMMC
2GB DDR4-2400
No SDcard, USB3, SPDIF out, 3.5mm audio out

Currently Working:
HDR10, HDR10+, HLG
Dolby Vision profiles 4, 5, 7, 8 (same playback capabilities as AM6+/U22XJ)
DV FEL, TV & Player-led DV, CMV2.9/4.0
Dolby TrueHD and DD+ w/Atmos, DTS-HD/X
WiFi
CEC control
Bluetooth BR/EDR
**Widevine L1 & Playready support unaffected by unlock or CE

Not Working:
Bluetooth LE
IR (untested)

Unlocked Bootloader Required
USB booting requires an unlocked bootloader (read here for instructions). Any new/sealed 2nd gen Cube can be unlocked, follow the XDA thread, or this guide, to avoid updating the FireTV when powering on for the first time.

Download DTB
Get the latest DTB for the 2nd gen Cube here. The DTB is packed into the kernel.img, so just replace kernel.img on the CoreELEC partition of your USB drive with the provided one in the link, and boot.

I’m trying to resolve a problem with USB reading/writing.

Either copying to, or reading from, more than ~500MB from the USB drive (via samba, ssh, or cp /storage/fileA storage/fileB) crashes CE.

CE-USB-Read-Crash (52.5 KB)
CE-USB-Write-Crash (72.3 KB)

Attempted fixes:
different USB drives
CE NG 20.2 stable and CE NG Nightly 20.3

dmesg of normal bootup
http://ix.io/4Emb

2nd gen Cube CE DTB
g12brevb-raven-2g.dtb (72.3 KB)
2nd gen Cube CE DTS
g12brevb-raven-2g.dts (4.2 KB)
Native FireOS/Android DTS
7224-3337_g12brevb-raven-2g.dts (100.0 KB)

The crash log indicates a problem with the dmc_monitor. The Cube also has problems with the MHU/mailbox node which results in timeouts during boot

[   11.281127@0]- Warning: scpi wait ack time out 0
[   21.521118@0]- Warning: scpi wait ack time out 0
[   31.761129@0]- Warning: scpi wait ack time out 0
[   42.001122@0]- Warning: scpi wait ack time out 0

For the moment, I have removed this node. These two issues together make me wonder if there is an issue with communication with the SMC/BL31?

Do you know if there are any differences as far as the SMC that need to be accounted for with Amlogic devices that use secure boot? @Portisch @vpeter

Chewitt over at LE pointed me in the right direction to fix the USB read/write kernel crashes.

The default s922x DTB doesn’t cover the BL32 memory range in the reserved memory. I’m not sure how this isn’t an issue for other s922x devices? For now I’m using the native vendor dtb values below to fix the crashing. Alternatively, linux,secos could be enabled in reserved memory.

	reserved-memory {
		linux,secmon {
			size = <0x00 0x2400000>;
			alloc-ranges = <0x00 0x5000000 0x00 0x2400000>;
		};
	};

	secmon {
		reserve_mem_size = <0x2300000>;
		clear_range = <0x5100000 0x1e00000>;
	};

Unfortunately the MHU/SCPI timeouts are still present.

Because BL32 is used only on locked devices.

Makes sense. Let me know if there are any other DTB properties that require modification for secure boot.

Regarding the Mailbox/SCPI timeouts

[   11.278713] Warning: scpi wait ack time out 0
[   21.518713] Warning: scpi wait ack time out 0
[   31.758718] Warning: scpi wait ack time out 0
[   41.998712] Warning: scpi wait ack time out 0
[   41.999168] usbcore: registered new interface driver snd-usb-audi

These always occur immediately before loading the snd-usb-audi driver. Deleting the MHU node, I can see that the usb driver is always loaded immediately after the bl301_manager driver

[    1.103597] bl301_manager: driver init
[    1.103638] bl301_manager: IR remote wake-up code: 0xffffffff
[    1.104163] bl301_manager: IR remote wake-up code mask: 0xffffffff
[    1.104964] bl301_manager: IR remote wake-up code protocol: 0x0
[    1.105733] bl301_manager: enable 5V system power on suspend/power off state: 0
[    1.107228] usbcore: registered new interface driver snd-usb-audio

I think the 4 (10sec each) SCPI timeouts are because the 4 bl301_manager commands are failing. I understand that the bl301_manager driver is not for all devices, and apparently not the Cube either. Is there a way to disable this driver from loading? the 40sec delay results in frequent system hangs / incomplete boots.

For a short test you can disable this line and recompile CE:

Thank you. Is it possible to download just the CE components needed to compile the kernel? I’m running out of room with TWRP and LineageOS builds now.

EDIT: I think I got it

git clone https://github.com/CoreELEC/CoreELEC.git
cd CoreELEC
PROJECT=Amlogic-ce DEVICE=Amlogic-ng ARCH=aarch64 ./scripts/build linux

Confirming, compiling the kernel without the bl301_manager driver eliminates the 4 SCPI timeouts

[    1.124184] defendkey: probe of ff630218.defendkey failed with error -22
[    1.126329] usbcore: registered new interface driver snd-usb-audio
[    1.127725] aml_codec_T9015 ff632000.t9015: aml_T9015_audio_codec_probe

full dmesg: http://ix.io/4ECe

That’s strange and looks like a bug in bl30 blob.
It should just ignore the unknown cmds.

To avoid this it will require a complete restructure of the bl301_manager.

Maybe you add debug prints in the scpi functions and check if any other driver do send data?

That sounds like good idea, I’d like to check that SCPI sends are working at all. Do you suggest adding one print command to send_scpi_cmd in scpi_protocol.c? Or something more elaborate than that?

example

static int send_scpi_cmd(struct scpi_data_buf *scpi_buf,
			 bool high_priority, int c_chan)
{
	/* print log message */
	pr_info("send_scpi_cmd called\n");
...

If it’s informative at all, I can upload the decrypted bootloader from the Cube.

Added print command

No bl301_manager driver in kernel
dmesg: PasteCry.pt: A secure pasting solution offering client-side encryption.

The send_scpi_cmd function is being called 4 times by messon-mmc and cectx ff80023c.ao (my guess).

bl301_manager driver included in kernel
dmesg: PasteCry.pt: A secure pasting solution offering client-side encryption.

Including the bl301_manager there are 8 send_scpi_cmd calls. 1 occurs after bl301_manager driver is initialized, then 3 more before each SCPI time out.

Maybe it’s specifically the enable 5V system power command that is attempting and failing send_scpi_cmd 4x?
bl301_manager: enable 5V system power on suspend/power off state: 0

Here is the solution for 5.4 kernel, tested and working:

But it’s not compatible with 4.9.

You can try this patch for 4.9 kernel, untested:
0001-bl30_manager-send-scpi-cmds-only-by-sysfs-call.patch (2.3 KB)

Then no scpi cmds are automatic send anymore.
This must be done then by inject_bl301 scripts.

1 Like

Thank you, it is working as intended. Bl301_manager driver is initiated, but no scpi cmds are sent on boot.

dmesg
http://ix.io/4EHc

Tomorrow nightly 20.3 and 21.0 should not send scpi cmds anymore if not bl301 is injected.

1 Like

I was reviewing the operating points node for my DTB, and it’s organized a little differently than the w400-b.dtsi. I noticed an oddity in the w400-b.dtsi that looks like a potential error? I may just be misunderstanding how the node should be arranged.

2nd gen Cube native cpu_opp_table1

	cpu_opp_table1 {
		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x1f>;

		opp00 {
			opp-hz = <0x00 0x5f5e100>;	//100MHz
			opp-microvolt = <0xb2778>;	//731mV
		};

		opp01 {
			opp-hz = <0x00 0xee6b280>;	//250MHz
			opp-microvolt = <0xb2778>;	//731mV
		};

		opp02 {
			opp-hz = <0x00 0x1dcd6500>;	//500MHz
			opp-microvolt = <0xb2778>;	//731mV
		};

		opp03 {
			opp-hz = <0x00 0x27c19cc0>;	//667MHz
			opp-microvolt = <0xb2778>;	//731mV
		};

		opp04 {
			opp-hz = <0x00 0x3b9aca00>;	//1000MHz
			opp-microvolt = <0xb2778>;	//731mV
		};

		opp05 {
			opp-hz = <0x00 0x47868c00>;	//1200MHz
			opp-microvolt = <0xb7598>;	//751mV
		};

		opp06 {
			opp-hz = <0x00 0x5353c980>;	//1398MHz
			opp-microvolt = <0xbc3b8>;	//771mV
		};

		opp07 {
			opp-hz = <0x00 0x5a1f4a00>;	//1512MHz
			opp-microvolt = <0xbc3b8>;	//771mV
		};

		opp08 {
			opp-hz = <0x00 0x5fd82200>;	//1608MHz
			opp-microvolt = <0xbeac8>;	//781mV
		};

		opp09 {
			opp-hz = <0x00 0x6590fa00>;	//1704MHz
			opp-microvolt = <0xc11d8>;	//791mV
		};

		opp10 {
			opp-hz = <0x00 0x6b49d200>;	//1800MHz
			opp-microvolt = <0xcae18>;	//831mV
		};

		opp11 {
			opp-hz = <0x00 0x71b9c500>;	//1908MHz
			opp-microvolt = <0xd2348>;	//861mV
		};

		opp12 {
			opp-hz = <0x00 0x7829b800>;	//2016MHz
			opp-microvolt = <0xde698>;	//911mV
		};

		opp13 {
			opp-hz = <0x00 0x7d2b7500>;	//2100MHz
			opp-microvolt = <0xe82d8>;	//951mV
		};

		opp14 {
			opp-hz = <0x00 0x839b6800>;	//2208Mhz
			opp-microvolt = <0xf6d38>;	//1011mV
		};
	};

w400-b version

	cpu_opp_table1 {
		compatible = "operating-points-v2";
		opp-shared;
		phandle = <0x14>;

		opp00 {
			opp-hz = <0x00 0x1dcd6500>;	//500MHz
			opp-microvolt = <0xc0df0>;	//790mV
		};

		opp01 {
			opp-hz = <0x00 0x27c19cc0>;	//667MHz
			opp-microvolt = <0xc0df0>;	//790mV
		};

		opp02 {
			opp-hz = <0x00 0x3b9aca00>;	//1000MHz
			opp-microvolt = <0xc5c10>;	//810mV
		};

		opp03 {
			opp-hz = <0x00 0x47868c00>;	//1200MHz
			opp-microvolt = <0xc5c10>;	//810mV
		};

		opp04 {
			opp-hz = <0x00 0x5353c980>;	//1398MHz
			opp-microvolt = <0xcaa30>;	//830mV
		};

		opp05 {
			opp-hz = <0x00 0x5a1f4a00>;	//1512MHz
			opp-microvolt = <0xd4670>;	//870mV
		};	

		opp06 {
			opp-hz = <0x00 0x5fd82200>;	//1608MHz
			opp-microvolt = <0xde2b0>;	//910mV
		};

		opp07 {
			opp-hz = <0x00 0x6590fa00>;	//1704MHz
			opp-microvolt = <0xe57e0>;	//940mV
		};

		opp08 {
			opp-hz = <0x00 0x6b49d200>;	//1800MHz
			opp-microvolt = <0xcaa30>;	//830mV ---> is this right?
		};

		opp09 {
			opp-hz = <0x00 0x71b9c500>;	//1908MHz
			opp-microvolt = <0xd1f60>;	//860mV
		};

		opp10 {
			opp-hz = <0x00 0x7829b800>;	//2016MHz
			opp-microvolt = <0xde2b0>;	//910mV
		};

		opp11 {
			opp-hz = <0x00 0x7d2b7500>;	//2100MHz
			opp-microvolt = <0xea600>;	//960mV
		};

		opp12 {
			opp-hz = <0x00 0x839b6800>;	//2208MHz
			opp-microvolt = <0xfb770>;	//1030mV
		};
	};

With the native DTB the voltage is incrementally stepped up with each frequency, but with w400-b there is a drop in the voltage between opp07 &opp08?

Also, in cpu_opp_table0 why does w400-b max out at 1800Mhz and not 1900Mhz? Isn’t the maximum frequency of the small cores 1900Mhz? My native DTB goes up to 1900Mhz.

Lastly, the threshold values for Bifrost don’t increase incrementally throughout all the frequencies with w400-b:

		clk125_cfg {
			clk_freq = <0x7735940>;
			clk_parent = "fclk_div4";
			clkp_freq = <0x1dcd6500>;
			clk_reg = <0xa03>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0x1e 0x78>;
			phandle = <0x7d>;
		};

		dvfs250_cfg {
			clk_freq = <0xee6b280>;
			clk_parent = "fclk_div4";
			clkp_freq = <0x1dcd6500>;
			clk_reg = <0xa01>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0x50 0xaa>;
			phandle = <0x7e>;
		};

		dvfs285_cfg {
			clk_freq = <0x1107a76d>;
			clk_parent = "fclk_div7";
			clkp_freq = <0x1107a76d>;
			clk_reg = <0xe00>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0x00 0x4c>;	//low & high less than dvfs250
			phandle = <0x03>;
		};

		dvfs400_cfg {
			clk_freq = <0x17d78400>;
			clk_parent = "fclk_div5";
			clkp_freq = <0x17d78400>;
			clk_reg = <0xc00>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0x98 0xcf>;	
			phandle = <0x04>;
		};

		dvfs500_cfg {
			clk_freq = <0x1dcd6500>;
			clk_parent = "fclk_div4";
			clkp_freq = <0x1dcd6500>;
			clk_reg = <0xa00>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0x26 0xc2>;	//low & high less than dvfs400
			phandle = <0x05>;
		};

		dvfs666_cfg {
			clk_freq = <0x27bc86aa>;
			clk_parent = "fclk_div3";
			clkp_freq = <0x27bc86aa>;
			clk_reg = <0x800>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0x96 0xcb>;	
			phandle = <0x06>;
		};

		dvfs800_cfg {
			clk_freq = <0x2faf0800>;
			clk_parent = "fclk_div2p5";
			clkp_freq = <0x2faf0800>;
			clk_reg = <0x600>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0xe6 0xff>;	
			phandle = <0x07>;
		};

		dvfs850_cfg {
			clk_freq = <0x326cef80>;
			clk_parent = "gp0_pll";
			clkp_freq = <0x326cef80>;
			clk_reg = <0x200>;
			voltage = <0x47e>;
			keep_count = <0x05>;
			threshold = <0x9c 0xff>;	 //low is less than dvfs800
			phandle = <0x7f>;
		};
	};

high/low threshold values are sometimes higher and some times lower than the previous dvfs threshold values. With the native Cube values, there is a steady increase in the low/high threashold at every dvfs step

This is a copy of the native Cube DTS for comparison if you want a more detailed look
7224-3337_g12brevb-raven-2g.dts (100.5 KB)

I think it’s a merge error. We have it like this:

And more steps are here:

The only way to find the correct values is to run performance tests in every case and find our the minimum required voltage.

We use by default performance as it gives best result with media playback handling.
So only highest case is used anyway and the steps between are mostly ignored.

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Progress update on CoreELEC booting on the 2nd gen Cube. CE 20.2 has been booting stably the last few months. Updating to CE 20.3.

The 2nd gen Cube’s DTB is included in the kernel.img that can be downloaded here and placed on your CE flashed USB drive.

An unlocked bootloader is required to boot CoreELEC. Any new/sealed 2nd gen Cubes can be unlocked, by skipping the ‘mandatory’ setup OTA update with this guide.

There’s also a fair chance that any certified refurbished 2nd Cubes will be on FireOS P7292, and unlockable. So far a number of people have reported success with those.

Dolby Vision FEL, TrueHD, DTS-HD all work on the 2nd gen Cube in CE 20.4 and 21 nightly. These features are absent in FireOS.