H96 Pro+ S912 Standby mode

Hi,

I do have a H96 Pro+ board with 2/16GB, green PCB, CZ-S32-V2.2.

I have CoreELEC 8.95.2 on the SD card. The system is up and running!

But now I will take a look to the standby of the box.
First I enabled the standby mode in the “sleep.conf”.
The box is going to standby but I can only wake it up with the original remote - not by CEC or USB.

This I found out with the original Android ROM:

[ 202.433276@6] remote: back_usrcode = fe01,mouse shitch FN_KEY_SCANCODE = 0
[ 202.434571@6] remote: OK_KEY_SCANCODE = 13
[ 202.439040@6] remote: press ircode = 0x40,
[ 202.442508@0] remote: scancode = 0x0074,maptable = 4,code:0xbf40fe01
[ 202.444847@0]
[ 202.678377@0] remote: release ircode = 0x40,
[ 202.678524@0] remote: scancode = 0x0074, maptable = 4,code:0x00000000
[ 202.679230@0]
[ 203.277753@7] request_suspend_state: sleep (0->3) at 203179605928 (2015-01-01 00:03:26.038306428 UTC)
[ 203.281347@7] request_suspend_state,164,old_sleep=0,new_state=3
[ 203.287250@6] early_suspend: call handlers
[ 203.318173@6] avmute set to 2
[ 203.418533@3] hdmitx: system: HDMITX: early suspend
[ 203.418588@3] hdmitx: system: unmux DDC for gpio read edid
[ 203.423704@3]
[ 203.423704@3] vdac_enable: on:0,module_sel:8
[ 203.429219@3] fb: osd_suspended
[ 203.432186@3] remote: remote_early_suspend, set sleep 1
[ 203.437361@3] gxbb_pm: meson_system_early_suspend
[ 203.442030@3] sysled: edwin–> led_gpio_set val = 1
[ 203.446952@3] DEBUG:usb_early_suspend:: DWC_OTG: going early suspend! is_mount=0
[ 203.446952@3]
[ 203.455913@3] early_suspend: sync
[ 203.498015@3] suspend: exit suspend, ret = -22 (2015-01-01 00:03:26.258594928 UTC)
[ 208.548940@6] suspend: exit suspend, ret = -22 (2015-01-01 00:03:31.309510388 UTC)
[ 213.597058@6] suspend: exit suspend, ret = -22 (2015-01-01 00:03:36.357627516 UTC)
[ 218.646896@6] suspend: exit suspend, ret = -22 (2015-01-01 00:03:41.407464810 UTC)
[ 223.696949@6] suspend: exit suspend, ret = -22 (2015-01-01 00:03:46.457517937 UTC)
[ 228.747247@6] suspend: exit suspend, ret = -22 (2015-01-01 00:03:51.507817023 UTC)

The box is in standby and I can meassure 5V on the USB ports. So a wakeup on USB is working:

[ 230.632315@7] request_suspend_state: wakeup (3->0) at 230534169775 (2015-01-01 00:03:53.392869732 UTC)
[ 230.635988@7] request_suspend_state,164,old_sleep=1,new_state=0
[ 230.641921@4] late_resume: call handlers
[ 230.645748@4] DEBUG:usb_early_resume:: DWC_OTG: going early resume
[ 230.645748@4]
[ 230.653760@7] gxbb_pm: meson_system_late_resume
[ 230.658348@4] sysled: edwin–> led_gpio_set val = 0
[ 230.662950@4] fb: osd_resumed
[ 230.666112@4] tv_vout: tv_set_current_vmode[759]fps_target_mode=16
[ 230.672471@4] tv_vout: mode is 16,sync_duration_den=1,sync_duration_num=60
[ 230.678996@2] tv_vout: TV mode 1080p60hz selected.
[ 230.683549@2]
[ 230.683549@2] vdac_enable: on:0,module_sel:8
[ 230.689577@2]
[ 230.689577@2] vdac_enable: on:0,module_sel:8
[ 230.695292@2] tv_vout: new mode =1080p60hz set ok
[ 230.699904@2] hdmitx: set clk: VIC = 512 cd = 4
[ 230.704461@2] config HPLL = 3450000
[ 230.707922@2] HPLL: 0xc000028f
[ 230.710953@2] config HPLL done
[ 230.713964@2] set_hpll_od3_clk_div[441] div = 6
[ 230.713973@2] j = 9 vid_clk_div = 1
[ 230.796467@2] hdmitx: edid: check sum valid
[ 230.796500@2] hdmitx: edid: blk0 raw data
[ 230.799035@2] 00ffffffffffff0030ae4f11010101012a13010380251e782af7c1a3554c9b25
[ 230.799035@2] 125054bdef00714f8190010101010101010101010101302a009851002a403070
[ 230.799035@2] 1300782d1100001e000000ff00563154393932340a2020202020000000fd0038
[ 230.799035@2] 4c1e510e000a202020202020000000fc004c454e204c3139303070410a2000df
[ 230.799035@2]
[ 230.799035@2]
[ 230.830935@2] EDID Parser:
[ 230.833613@2] EDID BlockCount=0
[ 230.836682@2] hdmitx: edid: HDMI: set default vic
[ 230.841363@2] hdmitx: edid: edid blk0 checksum:0 ext_flag:0
[ 230.846883@2] hdmitx: video: get current mode: 1080p60hz
[ 230.852134@2] hdmitx: update rx hdr info 0
[ 230.856189@2] hdmitx: get ext_name 1080p60hz
[ 230.860438@2] hdmitx: system: already init VIC = 0 Now VIC = 16
[ 230.866353@2] hdmitx: rx edid only support RGB format
[ 230.871366@2] hdmitx: rx no SCDC present indicator
[ 230.880116@2] hdmirx version is 1.4 or below
[ 230.880325@2] hdmitx div40: 0
[ 230.908140@2] hdmitx: system: set mode VIC 16 (cd0,cs0,pm1,vd0,1)
[ 230.908581@2] hdmitx: system: set pll
[ 230.912203@2] hdmitx: system: param->VIC:16
[ 230.916343@2] hdmitx: set clk: VIC = 16 cd = 4
[ 230.926861@2] config HPLL = 2970000
[ 230.926894@2] HPLL: 0xc000027b
[ 230.927736@2] config HPLL done
[ 230.930769@2] set_hpll_od3_clk_div[441] div = 6
[ 230.935246@2] j = 4 vid_clk_div = 1
[ 230.938799@2] hdmitx: set enc for VIC: 16
[ 230.942758@2] hdmitx_set_hw[5011] set VIC = 16
[ 230.947329@0] hdmitx: system: irq 80000001
[ 230.951239@0] Start = 0x10000100 End = 0x100001ff
[ 230.956034@0] [0x10000104]: 0x00000001
[ 230.959945@0] [0x10000180]: 0x000000ff
[ 230.963446@0] [0x10000181]: 0x000000ff
[ 230.967154@0] [0x10000182]: 0x00000003
[ 230.970881@0] [0x10000183]: 0x00000007
[ 230.974572@0] [0x10000184]: 0x0000003f
[ 230.978315@0] [0x10000185]: 0x00000002
[ 230.981991@0] [0x10000187]: 0x000000ff
[ 230.985698@0] [0x10000188]: 0x00000003
[ 231.070146@2] hdmitx: system: phy setting done
[ 231.074174@2] Sink is DVI device
[ 231.074223@2] hdmitx: system: packet: can’t get vendor data
[ 231.077658@2] hdmtix: set audio
[ 231.080802@2] hdmitx tx_aud_src = 0
[ 231.084235@2] hdmitx: fs = 3, cd = 4, tmds_clk = 148500
[ 231.089395@2] hdmitx aud_n_para = 6144
[ 231.093111@2] hdmitx set channel status
[ 231.096947@2] hdmitx: audio: Audio Type: PCM
[ 231.105998@2] amhdmitx: late resume module 204
[ 231.106082@2] hdmitx: swrstzreq
[ 231.106532@4] avmute set to 2
[ 231.107141@4] vout_serve: vmode set to 1080p60hz
[ 231.107159@4] vout_serve: don’t set the same mode as current
[ 231.121756@4] fb: osd[0] enable: 1 (systemcontrol)
[ 231.121758@2] hdmitx: system: late resume
[ 231.121760@2] late_resume: done
[ 231.154770@4] vout_serve: osd0=> x:0,y:0,w:1920,h:1080
[ 231.154770@4] osd1=> x:0,y:0,w:18,h:18
[ 231.157991@4] fb: current vmode=1080p60hz
[ 231.171401@4] fb: osd[1] set scale, h_scale: ENABLE, v_scale: ENABLE
[ 231.172114@4] fb: osd[1].scaledata: 1920 1920 1080 1080
[ 231.177286@4] fb: osd[1].pandata: 0 0 0 0
[ 231.188019@4] avmute set to 1

On CoreELEC I send to standby:

bl30 get wakeup sources!
process command 00000006
bl30 enter suspend!
cpu clk suspend rate 1200000000
suspend_counter: 1
Enter ddr suspend
first time suspend
ddr suspend time: 1885us
store restore gp0 pll
process command 00000001
CEC cfg:0x0000
set vddee to 0x035cmv
089

The USB power got switched off (~1,1V) so wakeup by USB isn’t possible. Also CEC wakeup isn’t possible because the CEC device isn’t in the list on the TV. So I use the original remote to power up from standby:

exit_reason:0x02
set vddee to 0x03e8mv
set vdd_cpu a to 0x0460mv
set vdd_cpu a to 0x041amv
store restore gp0 pll
gp0 pll can’t lock
read gp0_ctrl 40000000
read gp0_ctrl2 0
read gp0_ctrl3 0
read gp0_ctrl4 0
Enter ddr resume
ddr resume time: 360us
cfg15 3b00000
cfg15 23b00000
cpu clk resume rate 1000000000

The box is resuming and working normaly. So something is wrong in standby mode.
It looks more than a hibernate because all of the hardware is switched off.

So my question is about how to fix the resume to be possible through USB or CEC!?
I am able to do hardware and software modification.
Please give me a hint where I have to start to fix this problem.

So when you wake from ‘standby’ you do not see the logo / splash screens as you do when you reboot? (Just trying to establish that you are actually in standby, as what you describe sounds like the box has received powerOff command) :thinking:

The box is going to standby. When resume there is no bootlogo or something else. It is just back to the last OSD screen in kodi.

It looks like there is getting switched off too much!
Like for suspend the USB and CEC part should not be switched off to be able to wakeup.

Oh well, that quickly turns it into something for the clever blokes then. Supply some logs so the devs can take a look at it

Here is the complete log recorded with the UART:
https://pastebin.com/xEkHcbHT

My research results are: I need to modify the u-boot.
But what u-boot source I can use?

I tried this one:

This is leading with make_p200 to a endless loop.

Any hint!?

1 Like

I have done a little bit of research and work…

I do have this Box with this remote:


It isn’t branded, 2/16G, q201 board.
First I have done a ROM update with the file :

aml_7.1.2_s912_q9377-S912_mac-20180409.img

Then I reworked the u-boot to match the hardware:

This fix the error of u-boot suspend:
gxl/gxm null reference fix power_off_at_mcu

Also in my fork, branch H96Pro+ there are some more bugfix for this board:
added IR code for power on after suspend
fix weak blue led on power up
fix red led on standby
fix timer wakeup calc
fixed IR remote on suspend resume (switching back to software decode)
do not turn on red led on power off

3 Likes

FYI: https://github.com/Portisch/u-boot/releases/tag/v0.1-alpha

Hi

Do u think would be possible adapt HDMI cec disable on boot and not power off HDMI on suspend to Minix U9-H ?

Device tree is this

Thanks

I am sure the problems can be fixed. Just the right defconfig have to be used to compile a u-boot version. Any chance to get a log of the original u-boot?

No. I’ve tried again with the same results. I cannot see any log during boot.

Also I’ve tried to change my USB TTL to debug pin in the mainboard OF MINIX and it broke, I think it burnt. Now I don’t have any other ttl to test.

Could be that uboot is encrypted?

With an encrypted bootloader, you would not be able to run the CE kernel. I think you just wrong connect the wires.

Could be.
I don’t think so. Before I burnt my ttl I could read something. Just plugin minix to power supply I could read this through Uart
--------------APROM-------------------

CPU @ 12000000Hz

Enter GET_ADC_DATE_PRO


GET_ADC_DATE_PRO : g_dataFlashAddr uData=0,date1_addr uData1= -1,Userdata_rtc_addr RTC_uData = 0


ADC_DATA1 = 0x18e


ADC_DATA2 = 0x18e


ADC_DATA3 = 0x18e


ADC_DATA4 = 0x18e


ADC_DATA5 = 0x18e


ADC_DATA6 = 0x18e


 check power<=5v and (uData == 0)||(uData == -1) !(uData1 ==1 ) APROM ls clean don't power on


g_apromSize = 16384,g_dataFlashAddr=15872,g_dataFlashSize=512,date1_addr=15904,Userdata_rtc_addr=15936


Userdata_rtc_addr RTC_uData_pro= 0

----SYSTEM POWER ON----


 POWER ON OF KEY BY P3.0 

As you can see, after push power on button I couldn’t read nothing. Strange

Maybe serial output is disabled in u-boot. Just push and hold a key on the keyboard (wired version) when power up. Maybe you enter then the u-boot console.

I’ve tried but no luck. I get the same boot response. I don’t know how active serial output. I’m frustrated!

Your device runs without problems with a custom u-boot q201_v1. Select a pre-compiled binary from the Portisch-Repository and install it. Then try recreating the bootlog. (By the way - Minix U9-H PCB has 2 x UART-Interface, 1 x with VCC_3.3V PIN and 1x without VCC PIN)

Thank!
I will try…but u @Portisch repo only are available q201_v2.2 or v5 versions. Can I use v2.2?

Thanks.

Yes, you can. Waking up with IR remote will probably not work on your device, but can be corrected later after testing.

I tried your fixed u-boot on my H96 Pro+ with blue PCB. I used the image from freaktab and replace the u-boot with the Amlogic Customization Tool. But know the internal Android does not start. If i insert my SD card with CoreElec, everything works at the moment, including PowerOn after PowerOff from CE. Any ideas?

Here my log:

GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 89649

BL2 Built : 16:32:58, Nov  3 2017.
gxl gb5491d8 - xiaobo.gu@droid12

set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
LPDDR3 chl: Rank0+1 @ 792MHz
DDR0_PUB_CATR0 1 value
DDR0_PUB_CATR0: 0x00141020....
DDR0_PUB_CATR1: 0x0203aaaa....
DDR0_PUB_PGSR0: 0x8000003f....
Rank0: 2048MB(auto)-2T-3
Rank1: 1024MB(auto)-2T-3
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00065800
NOTICE:  BL3-1: v1.0(release):35dd647
NOTICE:  BL3-1: Built : 15:20:30, Feb  7 2018
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3243-377db0f 2017-09-07 11:28:58 qiufang.dai@droid07]
OPS=0x82
wdt: reset registers!
68 ed de 3e 1c 0 71 de c5 d5 8c 71 [0.338674 Inits done]
secure task start!
high task start!
low task start!
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01-g226f741 (Oct 10 2018 - 14:02:52)

DRAM:  3 GiB
Relocation Offset is: b6eb5000
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:0;RCY:0;USB:0;
▒
▒
GXM:BL1:dc8b51:76f1a5;FEAT:ADFC318C:80;POC:3;RCY:0;EMMC:0;READ:0;0.0;CHK:0;
TE: 89343

BL2 Built : 16:32:58, Nov  3 2017.
gxl gb5491d8 - xiaobo.gu@droid12

set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 1
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
STICKY_REG0: 0x00000000
STICKY_REG1: 0x00000000
STICKY_REG9: 0x00000000
LPDDR3 chl: Rank0+1 @ 792MHz
DDR0_PUB_CATR0 1 value
DDR0_PUB_CATR0: 0x00141020....
DDR0_PUB_CATR1: 0x0203aaaa....
DDR0_PUB_PGSR0: 0x8000003f....
Rank0: 2048MB(auto)-2T-3
Rank1: 1024MB(auto)-2T-3
DataBus test pass!
AddrBus test pass!
-s
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x05100000, size: 0x0002c600
Load bl33 from eMMC, src: 0x00050200, des: 0x01000000, size: 0x00065800
NOTICE:  BL3-1: v1.0(release):35dd647
NOTICE:  BL3-1: Built : 15:20:30, Feb  7 2018
NOTICE:  BL31: BL33 decompress pass
mpu_config_enable:ok
[Image: gxl_v1.1.3243-377db0f 2017-09-07 11:28:58 qiufang.dai@droid07]
OPS=0x82
wdt: reset registers!
68 ed de 3e 1c 0 71 de c5 d5 8c 71 [0.338332 Inits done]
secure task start!
high task start!
low task start!
ERROR:   Error initializing runtime service opteed_fast


U-Boot 2015.01-g226f741 (Oct 10 2018 - 14:02:52)

DRAM:  3 GiB
Relocation Offset is: b6eb5000
register usb cfg[0][1] = 00000000b7f5b498
[CANVAS]canvas init
boot_device_flag : 1
Nand PHY Ver:1.01.001.0006 (c) 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
reset failed
get_chip_type and ret:fffffffe
get_chip_type and ret:fffffffe
chip detect failed and ret:fffffffe
nandphy_init failed and ret=0xfffffff1
MMC:   aml_priv->desc_buf = 0x00000000b3eb56b0
aml_priv->desc_buf = 0x00000000b3eb79d0
SDIO Port B: 0, SDIO Port C: 1
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
init_part() 293: PART_TYPE_AML
[mmc_init] mmc init success
dtb magic 5f4c4d41
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxm platform: q201 variant: unsupport
        dtb 0 soc: gxm   plat: q201   vari: 2g
        dtb 1 soc: gxm   plat: q201   vari: 3g
      Not match any dtb.
start dts,buffer=00000000b3eba200,dt_addr=00000000b3eba200
check_valid_dts: FDT_ERR_BADMAGIC
get_partition_from_dts: -9
get_ptbl_from_dtb()-259: get partition table from dts faild
mmc_device_init()-1081: get partition table from dtb failed
init_part() 293: PART_TYPE_AML
eMMC/TSD partition table have been checked OK!
check pattern success
mmc env offset: 0x27400000
In:    serial
Out:   serial
Err:   serial
reboot_mode=cold_boot
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-917: calc 5881527c, store 5881527c
_verify_dtb_checksum()-917: calc 5881527c, store 5881527c
dtb_read()-1039: total valid 2
dtb_read()-1106: do nothing
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxm platform: q201 variant: unsupport
        dtb 0 soc: gxm   plat: q201   vari: 2g
        dtb 1 soc: gxm   plat: q201   vari: 3g
      Not match any dtb.
[store]Err:do_store_dtb_ops,L330:Fail in fdt check header
board_late_init(): [store dtb read $dtb_mem_addr] fail
load dtb to 1000000
[store]To run cmd[emmc dtb_read 1000000 0x40000]
dtb_read_shortcut()-975: short cut in...
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxm platform: q201 variant: unsupport
        dtb 0 soc: gxm   plat: q201   vari: 2g
        dtb 1 soc: gxm   plat: q201   vari: 3g
      Not match any dtb.
[store]Err:do_store_dtb_ops,L330:Fail in fdt check header
board_late_init(): store dtb read 1000000 fail
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: clk_level = 7
vpu: set clk: 666667000Hz, readback: 666660000Hz(0x300)
vpu: vpu_clk_gate_init_off
vpp: vpp_init
hpd_state=0
cvbs performance type = 6, table = 0
vpp: vpp_pq_load pq val error !!!
Net:   dwmac.c9410000[KM]Error:f[keymanage_dts_parse]L287:not a fdt at 0x0000000001000000

Start read misc partition datas!
info->attemp_times = 0
info->active_slot = 0
info->slot_info[0].bootable = 1
info->slot_info[0].online = 1
info->slot_info[1].bootable = 0
info->slot_info[1].online = 0
info->attemp_times = 0
attemp_times = 0
active slot = 0
wipe_data=successful
wipe_cache=successful
upgrade_step=2
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[OSD]check dts: FDT_ERR_BADMAGIC, load default fb_addr parameters
[OSD]fb_addr for logo: 0x3d800000
[CANVAS]addr=0x3d800000 width=3840, height=2160
[KM]Error:f[keymanage_dts_parse]L287:not a fdt at 0x0000000001000000
gpio: pin GPIOAO_2 (gpio 102) value is 1
saradc: check dts: FDT_ERR_BADMAGIC, load default parameters
InUsbBurn
[MSG]sof
Set Addr 16
Get DT cfg
Get DT cfg
Get DT cfg
set CFG
waitIdentifyTime(751) > timeout(750)
Hit Enter or space or Ctrl+C key to stop autoboot -- :  0
ee_gate_off ...
## Booting Android Image at 0x01080000 ...
reloc_addr =b3f3a260
copy done
load dtb from 0x1000000 ......
      Amlogic multi-dtb tool
      Multi dtb detected
      Multi dtb tool version: v2 .
      Support 2 dtbs.
        aml_dt soc: gxm platform: q201 variant: unsupport
        dtb 0 soc: gxm   plat: q201   vari: 2g
        dtb 1 soc: gxm   plat: q201   vari: 3g
      Not match any dtb.
ERROR: image is not a fdt - must RESET the board to recover.
load dtb from 0xb480e260 ......
      Amlogic multi-dtb tool
      Cannot find legal dtb!
## No Flattened Device Tree
Could not find a valid device tree
[rsvmem] get fdtaddr NULL!
rsvmem - reserve memory

Usage:
rsvmem check                   - check reserved memory
rsvmem dump                    - dump reserved memory

rsvmem check failed
ee_gate_on ...

This u-boot version does not include multi-DTB support for 3G devices.

And what to do now? Take original image? With this version it seems, i dont have crashes like with your version in LE forums. Or can i put a DTB file somewhere?