H96 Pro+ S912 Standby mode

@derknut @bumerc
With the last commit the external RTL8211F is up and running in u-boot:

Now you need to set the wol mac end enable the chip when enter suspend. This is done like the set_wol in cmd_kbi:

#include <common.h>

#define MAC_LENGHT 6

static void set_wol(int enable)
char cmd[64];
int mode;

if ((enable&0x01) != 0) {

int mac_addr[MAC_LENGHT] = {0};

run_command(“phyreg w 0 0x1040”, 0);

run_command(“phyreg w 31 0xd40”, 0);
run_command(“phyreg w 22 0x20”, 0);
run_command(“phyreg w 31 0”, 0);

  char *s = getenv("mac");
  if ((s != NULL) && (strcmp(s, "00:00:00:00:00:00") != 0)) {
  	printf("set mac for wol = %s\n", s);
  	int i = 0;
  	for (i = 0; i < 6 && s[0] != '\0' && s[1] != '\0'; i++) {
  	mac_addr[i] = chartonum(s[0]) << 4 | chartonum(s[1]);
  	s +=3;
  } else {
  	printf("no mac for wol found\n");

run_command(“phyreg w 31 0xd8c”, 0);
sprintf(cmd, “phyreg w 16 0x%x%x”, mac_addr[1], mac_addr[0]);
run_command(cmd, 0);
sprintf(cmd, “phyreg w 17 0x%x%x”, mac_addr[3], mac_addr[2]);
run_command(cmd, 0);
sprintf(cmd, “phyreg w 18 0x%x%x”, mac_addr[5], mac_addr[4]);
run_command(cmd, 0);
run_command(“phyreg w 31 0”, 0);

run_command(“phyreg w 31 0xd8a”, 0);
run_command(“phyreg w 17 0x9fff”, 0);
run_command(“phyreg w 31 0”, 0);

run_command(“phyreg w 31 0xd8a”, 0);
run_command(“phyreg w 16 0x1000”, 0);
run_command(“phyreg w 31 0”, 0);

run_command(“phyreg w 31 0xd80”, 0);
run_command(“phyreg w 16 0x3000”, 0);
run_command(“phyreg w 17 0x0020”, 0);
run_command(“phyreg w 18 0x03c0”, 0);
run_command(“phyreg w 19 0x0000”, 0);
run_command(“phyreg w 20 0x0000”, 0);
run_command(“phyreg w 21 0x0000”, 0);
run_command(“phyreg w 22 0x0000”, 0);
run_command(“phyreg w 23 0x0000”, 0);
run_command(“phyreg w 31 0”, 0);

run_command(“phyreg w 31 0xd8a”, 0);
run_command(“phyreg w 19 0x1002”, 0);
run_command(“phyreg w 19 0x1002”, 0);

} else {
run_command(“phyreg w 31 0xd8a”, 0);
run_command(“phyreg w 16 0”, 0);
run_command(“phyreg w 17 0x7fff”, 0);
run_command(“phyreg w 31 0”, 0);

Then you have to check in detect_key function for the gpio: GPIOZ_15 or BOOT_8 (going from 1 to 0)
If 0 then wakeup by WOL. Manualy it is working fine - but I need help to implement the “set_wol” function…

That’s very good news. How did you test it, where you called set_wol()?
I would propose to write a new cmd module called “h96” or “wol” to setup the PHY. But I have no idea where to call it.

set_wol needs to be called after entering the suspend mode. But this is not possible because it is a different task.
Also compiling does not work…

I started u-boot into console with the last commit.
Entered by hand line for line into the console to setup the RTL8211F.
This brings the PEMB pin high and the chip is waiting for a magic packet.
If a packet got received the hardware pin goes low.
Then the endless while loop detect_key in pwr_ctrl.c have to check the gpio and start the wakeup/resume.

The problem is also when the linux kernel starts the RTL8211f registers are getting modified so the wol would not work anymore. The set_wol have to be called again.
The only way I see right now is that the linux kernel setup the chip for wol and u-boot is checking the gpio for wol wakeup.

That’s sound promising and is the regular “Linux way” to activate WOL by “ethtool”. I will check the Linux part. Alternative it may be possible to add a quick and dirty hack to pwr_ctr.c to send MDIO commands to the PHY without a driver.

@derknut WOL is working now:

Use the commit “check for RTL8211F PMEB interrupt by Wake-on-Lan packet” only if you included first the linux kernel pull request! Otherwise u-boot will resume immediately from poweroff/suspend.

I will write a how to enable the WOL to the wiki:

1 Like

@atomizasser you can do the following as a quick fix for wifi on resume

  1. Go to \\Configfiles\ and make a folder sleep.d
  2. Then in that folder create a file named 01-wifi-resume.power with this content:
case "$1" in
# <do something on suspend>
# <do something on resume>
connmanctl disable wifi
sleep 5
connmanctl enable wifi

Hi @Portisch,

I’ve installed your latest u-boot (just like atomizasser) on my minix u9-h.
However when I choose to suspend it doesn’t work (it’s the same as before).

I’ve uploaded the debug log from the moment i pressed the suspend. Can I provide anything else that may help to give you an idea why it doesn’t suspend? It would be great if you could take a look :slight_smile:
Or maybe there is something else blocking the suspend?

Thanks in advance,

kodi.log (8.8 KB)

edit: I’ve installed u-boot_q201_v2.2_green_PCB.tar.gz following the wiki on the github

This is the patch to compile CoreELEC with WOL on the wired eth interface enabled:linux-010_rtl8221f_wol_S912_gpioz_15.patch (4.8 KB)
Just copy it to


and compile the image with

PROJECT=Amlogic DEVICE=S912 ARCH=arm make

After update of the CoreELEC system update u-boot:
Compile and update u-boot with the last commit:

After flashing enable the WOL for the wired ethernet interface:

@freshprince only a dmesg log will help. Also a uart log of u-boot would be nice. Try to contact @atomizasser because I do not own such a box.

Hmm strange it keeps spamming a message in dmesg.
See attachment
dmesg.txt (17.6 KB)

Thanks a lot for the patches and info. Is there a shortcut to only build and replace a kernel/modules?

CoreElec build is running, but on my machine this seems to be a “long term solution” =;-)

@derknut https://mega.nz/#!WeA0zKZJ!HvhAah8M95BnBfQB_gcDxmNsT8wEmiXCWdElR8MmiQU

i did nothing special
After update the u-boot following guide, i activated suspend mode as guide said. Restart and test suspend mode; i got green light in minix box. Then i tested to wake up from HDMI CEC and worked great.
The only missing was WIFI module, but after following @anon88919003 suggestion, wifi was working again after wake up.

1 Like

@Portisch : Thanks a lot for the image, but unfortunately WOL is not working at my H96 Pro+. Even in standby mode the ETH link is off at my switch, PHY seems to be down.
I am wondering why I cannot read the DTB WOL status:
# hexdump /proc/device-tree/ethernet@0xc9410000/wol
With my first “home brewed” CoreElec image I will try to debug.

Thanks for any hint

Try fdtget if wol = 0 or 1: fdtget /flash/dtb.img /ethernet@0xc9410000 wol
Does fw_printenv mac show your mac address?
What does dmesg | grep wol show?
Every command is working only for CoreELEC on SD card!

Thanks a lot for your support, now it is working.

I am not sure what was the problem, but if I created a completely new SD card with release version, update to your image and u-boot and follow your WOL guide. I got this message at suspend:
set mac for wol = 78:c2:c0:...
The ETH link keeps active in “standby” and “power down” mode and
sudo wakeonlan 78:C2:C0:....
starts the device.

I will now update step by step my eMMC installation.

Very good work, thanks again.

P.S.: How I can create just a kernel with my changes, e.g. add printk for debugging? I tried
PROJECT=Amlogic DEVICE=S912 ARCH=arm ./scripts/build linux
but the changed kernel is not recompiled. The “clean” script deletes the complete kernel source including my changes. I am also confused about “ARCH=arm” for a “aarch64” target.

Drop a xxx.patch file in /CoreELEC/packages/linux/patchs and recompile as normal. Then the linux-amlogic is getting purged and recompiled.

Sorry for bother you again, but I have still difficulties to bring up WOL with eMMC boot. Using the same Kernel/U-Boot and DTB I cannot see “set wol” at dmesg. Is eMMC boot using a different DTB?
Thanks a lot for any hint

@Portisch I just installed the working SD card to eMMC and WOL is working. Thanks a lot for your support

I’ve been using the new uboot for a while now. Sometimes while playing videos the box crashed. The screen just gets completely one random color. I thought that it might be due to the power supply again (because I use an external 2.5" HDD with USB on the box). It couldn’t play 4k content anymore because the box crashed after a few seconds.
Now I have flashed the original uboot and have to realize that there are no crash problems anymore.
That’s why I created a log via UART:


TE: 110268

BL2 Built : 13:38:48, Mar 8 2017.
gxl g8e12692 - xiaobo.gu@droid05

set vdd cpu_a to 1120 mv
set vdd cpu_b to 1050 mv
set vddee to 1000 mv
Board ID = 3
CPU clk: 1200MHz
DQS-corr enabled
DDR scramble enabled
DDR3 chl: Rank0+1 @ 816MHz - PASS
Rank0: 2048MB(auto)-2T-13
Rank1: 1024MB(auto)-2T-13
DataBus test pass!
AddrBus test pass!
Load fip header from eMMC, src: 0x0000c200, des: 0x01400000, size: 0x00004000
New fip structure!
Load bl30 from eMMC, src: 0x00010200, des: 0x01100000, size: 0x0000d600
Load bl31 from eMMC, src: 0x00020200, des: 0x10100000, size: 0x0001b400
Load bl33 from eMMC, src: 0x0003c200, des: 0x01000000, size: 0x000b5e00
NOTICE: BL3-1: v1.0(debug):866a5ea
NOTICE: BL3-1: Built : 15:50:05, Feb 28 2017
aml log : bl31 normal boot !

[Image: gxl_v1.1.3194-db501b7 2017-03-28 15:06:09 yun.cai@droid06]


wdt: reset registers!

8d a f2 47 2b 70 cf ee 81 56 16 5b [0.380194 Inits done]

secure task start!
high task start!
low task start!
INFO: BL3-1: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader
ERROR: Error initializing runtime service opteed_fast
INFO: BL3-1: Preparing for EL3 exit to normal world
INFO: BL3-1: Next image address = 0x1000000
INFO: BL3-1: Next image spsr = 0x3c9

U-Boot 2015.01-gf55a714-dirty (Apr 13 2017 - 11:52:00)

Relocation Offset is: b6ebb000
register usb cfg[0][1] = 00000000b7f5c6e8
[CANVAS]canvas init
vpu: error: vpu: check dts: FDT_ERR_BADMAGIC, load default parameters
vpu: clk_level = 7
vpu: set clk: 666667000Hz, readback: 666660000Hz(0x300)
vpp: vpp_init
boot_device_flag : 1
Nand PHY Ver: © 2013 Amlogic Inc.
init bus_cycle=6, bus_timing=7, system=5.0ns
reset failed
get_chip_type and ret:fffffffe
get_chip_type and ret:fffffffe
chip detect failed and ret:fffffffe
nandphy_init failed and ret=0xfffffff1
MMC: aml_priv->desc_buf = 0x00000000b3ebb6b0
aml_priv->desc_buf = 0x00000000b3ebd9d0
SDIO Port B: 0, SDIO Port C: 1
emmc/sd response timeout, cmd8, status=0x1ff2800
emmc/sd response timeout, cmd55, status=0x1ff2800
init_part() 278: PART_TYPE_DOS
[mmc_init] mmc init success
dtb magic 5f4c4d41
Amlogic multi-dtb tool
Multi dtb detected
edwin—>DDR size: 0xb8000000
Multi dtb tool version: v2 .
Support 3 dtbs.
aml_dt soc: gxm platform: q201 variant: 3g
dtb 0 soc: gxm plat: q201 vari: 1g
dtb 1 soc: gxm plat: q201 vari: 2g
dtb 2 soc: gxm plat: q201 vari: 3g
Find match dtb: 2
start dts,buffer=00000000b3ec0200,dt_addr=00000000b3ed7a00
Amlogic multi-dtb tool
Multi dtb detected
edwin—>DDR size: 0xb8000000
Multi dtb tool version: v2 .
Support 3 dtbs.
aml_dt soc: gxm platform: q201 variant: 3g
dtb 0 soc: gxm plat: q201 vari: 1g
dtb 1 soc: gxm plat: q201 vari: 2g
dtb 2 soc: gxm plat: q201 vari: 3g
Find match dtb: 2
parts: 10
00: logo 0000000002000000 1
01: recovery 0000000002000000 1
02: rsv 0000000000800000 1
03: tee 0000000000800000 1
04: crypt 0000000002000000 1
05: misc 0000000002000000 1
06: boot 0000000002000000 1
07: system 0000000080000000 1
08: cache 0000000020000000 2
09: data ffffffffffffffff 4
_check_ptbl_mbr()-815: MBR is OK!
init_part() 278: PART_TYPE_DOS
eMMC/TSD partition table have been checked OK!
check pattern success
mmc env offset: 0x27400000
In: serial
Out: serial
Err: serial
cvbs performance type = 6, table = 0
[store]To run cmd[emmc dtb_read 0x1000000 0x40000]
_verify_dtb_checksum()-918: calc dde2bfb2, store dde2bfb2
_verify_dtb_checksum()-918: calc dde2bfb2, store dde2bfb2
dtb_read()-1040: total valid 2
dtb_read()-1107: do nothing
Amlogic multi-dtb tool
Multi dtb detected
edwin—>DDR size: 0xb8000000
Multi dtb tool version: v2 .
Support 3 dtbs.
aml_dt soc: gxm platform: q201 variant: 3g
dtb 0 soc: gxm plat: q201 vari: 1g
dtb 1 soc: gxm plat: q201 vari: 2g
dtb 2 soc: gxm plat: q201 vari: 3g
Find match dtb: 2
vpp: vpp_pq_load pq val error !!!
Net: dwmac.c9410000amlkey_init() enter!
[EFUSE_MSG]keynum is 4
[BL31]: tee size: 0

[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x7f851000
[OSD]load fb addr from dts
[OSD]fb_addr for logo: 0x7f851000
[CANVAS]addr=0x7f851000 width=3840, height=2160
amlkey_init() enter!
amlkey_init() 71: already init!
[EFUSE_MSG]keynum is 4
[BL31]: tee size: 0
[KM]Error:f[key_manage_query_size]L507:key[usid] not programed yet
[KM]Error:f[key_manage_query_size]L507:key[deviceid] not programed yet
gpio: pin GPIOAO_2 (gpio 102) value is 1
Hit Enter or space or Ctrl+C key to stop autoboot – : 1 0
card in
init_part() 278: PART_TYPE_DOS
[mmc_init] mmc init success
Device: SDIO Port B
Manufacturer ID: 2
OEM: 544d
Name: SD04G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 3.7 GiB
mmc clock: 40000000
Bus Width: 4-bit
reading kernel.img
10045440 bytes read in 577 ms (16.6 MiB/s)
reading dtb.img
44306 bytes read in 7 ms (6 MiB/s)
ee_gate_off …
Booting Android Image at 0x01080000 …
reloc_addr =b3f40450
copy done
load dtb from 0x1000000 …
Amlogic multi-dtb tool
Single dtb detected
Uncompressing Kernel Image … OK
kernel loaded at 0x01080000, end = 0x01bb2218
Loading Ramdisk to b3a88000, end b3ea9400 … OK
Loading Device Tree to 000000001fff2000, end 000000001ffffd11 … OK
fdt_instaboot: no instaboot image

Starting kernel …

The Ram runs here with 816MHz (not 792MHz) and CL13 (not CL11). Does anyone have an idea what causes the crashes? If certain logs are needed, I can add them.