https://discourse.coreelec.org/t/dvb-s2-tuner-avl62x1-tv-headend-scan-problem/17436
This link shows that in 2021, in the availink repository, a signal was received with this avl6261 using the coreelec hack 9.2.1 build with kernel 3.14. The necessary dmesg and dts files are available, but they are for kernel 3.14. Again, the issue has not been further investigated. Commits · availink/CoreELEC_avl · GitHub
You should look at the patches and commits here. Although it’s not related to our main driver, it might give you an idea. I’ll look into it, but there are no other known open-source driver repositories. It might be somewhere on GitHub. It might be in an Android SDK.
Sdmc
#include "gxl_p231_2g.dts"
/{
le-dt-id = "gxl_p231_2g_dvb";
dvb {
compatible = "amlogic,dvb";
dev_name = "dvb";
ts0 = "parallel";
ts0_control = <0x0>;
ts0_invert = <0x0>;
fec_reset_gpio-gpios = <&gpio GPIODV_12 GPIO_ACTIVE_HIGH>;
power_ctrl_gpio-gpios = <&gpio GPIODV_15 GPIO_ACTIVE_LOW>;
pinctrl-names = "p_ts0", "s_ts0", "s_ts1";
pinctrl-0 = <&dvb_p_ts0_pins>;
pinctrl-1 = <&dvb_s_ts0_pins>;
pinctrl-2 = <&dvb_s_ts1_pins>;
resets = <&clock GCLK_IDX_DEMUX &clock GCLK_IDX_ASYNC_FIFO &clock GCLK_IDX_AHB_ARB0 &clock GCLK_IDX_HIU_PARSER_TOP>;
reset-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
};
dvbfe {
compatible = "amlogic,dvbfe";
//dev_name = "dvbfe";
status = "okay";
dtv_demod0 = "avl6261";
dtv_demod0_i2c_adap_id = <3>;
dtv_demod0_i2c_addr = <0x14>;
dtv_demod0_tuner_i2c_addr = <0x62>;
dtv_demod0_reset_value = <0>;
dtv_demod0_reset_gpio-gpios = <&gpio GPIODV_12 GPIO_ACTIVE_LOW>;
dtv_demod0_power_gpio-gpios = <&gpio GPIODV_15 GPIO_ACTIVE_LOW>;
fe0_dtv_demod = <0>;
fe0_ts = <0>;
fe0_dev = <0>;
};
};
&pinmux {
dvb_p_ts0_pins:dvb_p_ts0_pins {
amlogic,setmask = <0x2 0x1f>;
amlogic,clrmask = <0x3 0x787 0x2 0xff000400>;
amlogic,pins = "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4", "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9", "GPIODV_10";
};
dvb_s_ts0_pins:dvb_s_ts0_pins {
amlogic,setmask = <0x2 0x17>;
amlogic,clrmask = <0x3 0x584 0x2 0x7000000 0x1 0x100>;
amlogic,pins = "GPIODV_0", "GPIODV_8", "GPIODV_9", "GPIODV_10";
};
dvb_s_ts1_pins:dvb_s_ts1_pins {
amlogic,setmask = <0x3 0x17>;
amlogic,clrmask = <0x2 0xf0000 0x1 0x7>;
amlogic,pins = "GPIODV_0", "GPIODV_8", "GPIODV_9", "GPIODV_10";
};
dtv_params_pin:dtv_params_pin {
amlogic,clrmask = <0x1 0x38000000 0x3 0x80>;
amlogic,pins = "GPIODV_13", "GPIODV_14", "GPIODV_15";
};
};
&i2c_a {
status = "okay";
};
&i2c_b {
status = "okay";
};
&i2c_c {
status = "okay";
pinctrl-0=<&c_i2c_master_pin1>;
};
&i2c_d {
status = "okay";
};